The tutorials introduce non-experts to the state-of-the-art in integrated circuits, and give understanding of and perspective on presentations at ISSCC. Each tutorial is on a seminal topic related to the conference and is presented by an expert member of the Technical Program Committee. The 6 tutorials run in parallel on Sunday, February 6 and are scheduled to begin at 8 AM, 10 AM, and 3 PM. Each is about 90 minutes. Attendees may register for up to 3 tutorials, on a first-come, first-served basis. Attendees will be informed as to the time of their sessions. A ticket, required for admission to each tutorial, will be included in the ISSCC registration packet.

Registration: Use the registration form on Advance Program centerfold.

Architecture options and design considerations for analog circuits in baseband receivers: AGC amplifiers, filters, adaptive and programmable equalizers, and sampling detectors. System requirements and options for A/D conversion.

Instructor: Paul Hurst , UC, Davis, received BS, MS, and PhD in EE from UC, Berkeley in 1977, 1979, and 1983. From 1983 to 1984, he was with UC B, as a lecturer, teaching integrated-circuit design, working on an MOS [Sigma][Delta] modulator. In 1984, he joined Silicon Systems Inc., Nevada City, CA, where he designed CMOS ICs for voice-band modems. Since 1986, he has been with the Dept. of E&CE at UC Davis, where he is Professor. His research interests are in analog and mixed-signal IC design for signal processing and communication applications. He is a consultant to industry.

Description of networked home and overview of promising networking technologies. An introductory overview of a various technologies including power-line, phone-line, and wireless solutions such as home RF and Bluetooth.

Instructor: Gitty Nasserbakht , Proxim, Sunnyvale, CA, received BS in electrical engineering, computer sciences, and nuclear engineering from UC Berkeley, and the MS and PhD EE from Stanford Univ. Her doctoral research was on high-performance optical-receiver front-ends. She was previously with AMD in Sunnyvale, and the DSP R&D Center at TI where she worked on BiCMOS and CMOS RFICs. She is currently the Director of RF Communications at Proxim in Sunnyvale, CA. Her interests include analog, digital, RF ICs, and wireless communications.

Partially-depleted silicon-on-insulator (PD-SOI) technology reduces CMOS circuit delay and power and creates design complexity. After review of SOI structure and device physics, responses and preferred design practices for static, dynamic and pass gate circuits are discussed, as well as specific circuits such as SRAMs, off-chip devices and PLLs, history effects, floating body effects, active parasitic elements, emerging SOI circuit topologies and impact of further scaling.

Instructor: Kerry Bernstein , IBM Microelectronics, Essex Junction, VT, is a Member of the Senior Technical Staff at IBM Microelectronics Division, Essex Junction, VT, in the Microprocessor Development Group. He is responsible for future product technology definition, performance and application. He received an engineering degree from Washington Univ. in St. Louis, and joined IBM in 1978. He holds 20 US Patents, and is author of a text on high-speed circuit design. His interests are in low-power high-speed electronics.

There are differences between fabrication of analog or digital circuits in CMOS and fabrication of an imaging circuit. This tutorial reviews boundary conditions for design and layout of an imager taking into account functionality of the device and limits imposed by the available technology. Questions addressed include: How does technology influence performance? What is new in testing and packaging an imagers compared to standard CMOS devices? The tutorial includes costing and economics.

Instructor: Albert Theuwissen , Philips Semiconductors, Eindhoven, The Netherlands, received MS EE ('77) and PhD EE ('83) from Univ. Leuven, Belgium. He joined Philips in 1983 and became department head of the imaging group of Philips Research in 1991. He has worked in solid-state imaging since 1976. He holds patents, and has authored and co-authored over 50 papers. In 1995 he published the textbook "Solid-State Imaging with Charge-Coupled Devices".

Packaging technology has been developing rapidly during the last decade. The requirements of fast, small electronic devices drive packaging technology to deal with better thermal performance, smaller form factor, and higher noise immunity. The transition from lead-frame type packages to ball-array types is accelerated by high I/O counts and high-density surface-mount technology. To design or select an optimum package for the device, factors to be weighed include mechanical, electrical, and chemical considerations.

Instructor: DongHo Lee , Samsung, Yongin City, Korea received PhD in CS from Lehigh Univ. in 1996 , researching design support software and knowledge-based systems for IC package design. He entered Samsung Electronics Co., Ltd. in January 1996 as manager of an IC package design group. He has overseen development of various generations of lead frame and substrate types for memory devices and has represented Samsung, at JEDEC JC-11 committee since 1997. He is now working on package modeling by electromagnetic simulation for high-speed devices such as Alpha CPU, fast synchronous SRAM, and Rambus DRAM.

Communication-specific requirements, such as filtering, voice coding and channel decoding are explained. Currently, two main evolutions can be distinguished: extremely-low-power DSP processors for handheld devices, and very-high-performance DSP processors for base stations. The design challenges of each class are illustrated with DSP processors from industry and academia.

Instructor: Chris Nicol , Bell Labs, Lucent Technologies, N. Ryde, Australia, received the PhD from University of New South Wales, Australia in 1995. From 1995-1998 he was a principal investigator of research at Bell Labs, Holmdel, NJ working on high-speed cache memories and low-power DSP architectures. He is currently working on baseband processors for next-generation wireless communications .

Instructor: Ingrid Verbauwhede , Univ. of California, Los Angeles, received PhD from K.U. Leuven, Belgium in 1991. From 1992 to 1994, she was a post-doctoral visiting researcher at UC Berkeley. From 1994 to 1998, she was Principal Engineer on a DSP processor for wireless communications at TCSI and ATMEL, and in 1998, joined UCLA as Assoc. Prof. Her current interest is design and VLSI implementation of domain-specific programmable processors.