SESSION
TA 9
SALON
8,
Tues,
8
8:30
AM
FILTERS
AND AMPLIFIERS
Chair:
V. Gopinathan, Bell Labs, Lucent Technologies,
Murray
Hill, NJ
Associate
Chair: R. Castello, Univ. of Pavia, Pavia, Italy
9.1 30-100MHz
npn-Only Variable-Gain Class AB
Companding-Based
Filters for 1.2V Applications
8:30
AM
M.
El-Gamal, R. Baki, A. Bar-Dor
McGill
Univ., Montreal, Quebec, Canada
Two
continuous-time companding-based filters are integrated in a 25GHz bipolar
process. The -3dB frequencies are tunable over 1-30MHz and 30-100MHz. The DC
gain is controllable up to 10dB. Dynamic range for 1% THD are 62.5dB and 50dB,
for the 30MHz and 100MHz filters, respectively. Power dissipation is 6.5mW from
a 1.2V supply
9.2 A
10.7MHz CMOS SC Radio IF Filter with Variable Gain
and
a Q of 55
9:00
AM
K.
van Hartingsveldt, P. Quinn
1,
A. van Roermund
Delft
Univ. of Technology, Delft, The Netherlands
1Philips
Semiconductors B. V., Eindhoven, The Netherlands
A
10.7MHz SC IF filter with a Q of 55 and >35dB inherent gain control is
realized in 0.6
um
CMOS. The filter shows 0.024% accuracy in center frequency and 1% in Q. The
filter and the clock circuit consumes 16mW from 3.3V.
9.3 A
1V CMOS Switched-Opamp Switched-Capacitor
Pseudo-2-Path
Filter
9:30
AM
V.
Cheung, H. Luong, W-H. Ki
Hong
Kong Univ. of Science and Technology, Clear Water Bay,
Hong
Kong
A
switched opamp technique operating in all clock phases realizes a SC
pseudo-2-path filter. The 6th-order bandpass response is centered at 75kHz with
a Q of 45. The dynamic range is 54dB. Implemented in 0.5
um
CMOS, the chip occupies 0.8mm
2,
and consumes 310
uW
from a 1V supply.
BREAK 10:00
AM
9.4 A
CMOS Nested Chopper Instrumentation Amplifier
with
100nV Offset
10:15
AM
A.
Bakker, K. Thiele
1,
J. Huijsing
Delft
Univ. of Technology, Delft, The Netherlands
1Philips
Research Labs, Sunnyvale, CA
A
CMOS instrumentation amplifier uses two nested chopping pairs to achieve 100nV
typical offset. The inner chopping pair removes 1/f noise, while the outer pair
reduces residual offset. The test chip has an input referred thermal noise of
27nV/
[radical]Hz
and consumes 200
uA
of current from a 5V supply.
9.5 A
3GHz, 32dB CMOS Limiting Amplier for
SONET
OC-48 Receivers
10:45
AM
E.
Säckinger, W. C. Fischer
Bell
Labs, Lucent Technologies, Holmdel, NJ /
1Murray,
NJ
A
limiting amplifier employs inversely-scaled amplifiers to achieve 3GHz
bandwidth, 32dB gain and 2.2mV
pp
sensitivity (for 10
-12
BER). Implemented in 0.25
um
CMOS, the circuit employs active inductors with low voltage drop and consumes
53mW from a 2.5V supply.
9.6 A
12GHz 30dB Modular BiCMOS Limiting Amplifier for
10Gb
SONET Receiver
11:15
AM
H.
H. Kim, J. Bauman
Bell
Labs, Lucent Technologies, Holmdel, NJ
A
2.5V limiting amplifier implemented in 0.25
um
BiCMOS has 12GHz bandwidth and 3.25mV
pp
sensitivity at 10
-12
BER.
The circuit including the output buffers consumes 115mW and has a 30dB
differential S
21.
9.7 A
622Mb/s 4.5pA/
[radical]Hz
CMOS Transimpedance
Amplifier
11:30
AM
B.
Razavi
Univ.
of California, Los Angeles, CA
A
transimpedience amplifier employs capacitive feedback to achieve 4.5pA/
[radical]Hz
average input noise current with 8.7k
Ohm
gain and 550MHz -3dB bandwidth. In 0.6
um
CMOS, the circuit consumes 30mW from a 3V supply and occupies 400x500
um2.
CONCLUSION 11:45
AM