SESSION
TA 8
SALON
7,
Tues,
8
8:30
AM
WIRELESS
RX / TX
Chair:
T. Lee, Stanford Univ., Stanford, CA
Associate
Chair: T. Stetzler, Texas Instruments, Stafford, TX
8.1 A
Fully-Integrated Zero-IF DECT Transceiver
8:30
AM
F.
Opt Eynde, J. Craninckx, P. Goetschalckx
Alcatel
Microelectronics, Zaventum, Belgium
A
2.7V 0.35
um
BiCMOS IC realizes a complete DECT non-blind slot transceiver with a minimal
number of external components. The LO synthesizer uses a double-frequency VCO
with integrated spiral coil and digital self-calibration. The zero-IF receiver
has 5dB noise figure and uses internal offset compensation. The direct
upconversion transceiver output power is -6dBm.
8.2 A
Fully-Integrated Broadband Direct-Conversion Receiver for DBS Applications
9:00
AM
A.
Jayaraman, B. Terry, B. Fransis, P. Sullivan, M. Lindstrom,
J.
OConnor
Conexant
Systems Inc., San Diego, CA
A
single-chip direct-conversion receiver including the frequency synthesizer (PLL
and VCO) is capable of tuning to channels in the 950-2150MHz band using no
external filters or varactors. The receiver satisfies requirements for use in a
DSS/DVB system between the LNB and baseband demodulator for 1-45MSample/s data
rates.
8.3 A
2V CMOS Cellular Transceiver Front-End
9:30
AM
M.
Steyaert, J. Janssens, B. De Muer, M. Borremans, N. Itoh
1
Katholieke
Univ. Leuven, Heverlee, Belgium
1Toshiba
Corp., Saiwai-ku, Kawasaki, Japan
A
low-IF RX (LNA, I/Q mixers and VGAs) and a direct up-conversion TX (I/Q mixers
and output stage) are integrated on a single die with a complete PLL
(quadrature VCO, 64/79 prescaler, loop filter, phase detector). The 2V 0.25
um
CMOS IC consumes 191mW in RX mode and 160mW in TX mode. The chip is for class
I/II DCS-1800 operation.
BREAK 10:00
AM
8.4 A
RF Transceiver for Digital Wireless Communication in a 25GHz Si Bipolar
Technology
10:15
AM
G.
Li Puma, K. Hadjizada, S. van Waasen, C. Grewing, P. Schrader, W. Geppert, M.
Seth
1,
S. Heinen
Infineon
Technologies, Duesseldorf, Germany /
1
Munich,
Germany
A
RF Si bipolar transceiver IC for DECT comprises fully-integrated VCOs for
transmit and receive and an image-reject front-end. The complete transceiver
operates from 3.1V to 5.1V needing no mechanical tuning or trimming. The
receiver achieves -95dBm sensitivity and draws 50mA.
8.5 An
Adaptive 2.4GHz Low-IF Receiver for Wideband Wireless LAN in 0.6
um
CMOS
10:45
AM
F.
Behbahani, J. Leete, W. Tan, Y. Kishigami, A. Karimi-Sanjani,
A.
Roithmeier, K. Hoshino, A. Abidi
Univ.
of California, Los Angeles, CA
A
single-chip low-IF receiver uses dual-down conversion and achieves repeatable
58dB wideband on-chip image rejection. An active filter provides IF BW variable
from 625kHz to 10MHz. In a complete system at 30Mb/s data rate using 64-QAM,
the receiver drains 50mA from a 3.3V supply, and provides 8.9dB NF with IIP3
from -10dBm to -2dBm.
CONCLUSION 11:15
AM