ISSCC 1999 - SIGNAL PROCESSING
1999 ISSCC - SIGNAL PROCESSING
Subcommittee Chair: Anantha Chandrakasan, MIT, Cambridge, MA
HIGHLIGHTS
- Disk-Drive Signal Processing [MP2]
- Analog front-ends for DSL systems [TP14]
- Video and multimedia processors [TP15]
- Single-chip solutions for broadband access and digital TV [WA19]
MOST-SIGNIFICANT RESULTS
- Fully-integrated hard-disk-drive IC [2.5]
- 70Mb/s VDSL chip includes a new architecture for high-speed computation of
FFT/IFFT [14.6]
- MPEG2 Encoder chip includes Video, Audio & System [15.7]
- Mixed-signal CMOS digital satellite-receiver chip with 480MHz IF input
[19.1]
APPLICATIONS
- Low-cost high-capacity hard drives
- High-speed Internet access over phone lines
- Video Conferencing and Computer Entertainment
- High-data-rate low-cost broadband access solutions
ECONOMIC AND SOCIAL IMPACT
- Increased data storage for sub-$500 PC
- Computer Entertainment with Hollywood quality at consumer prices
- More, better and more-widely-available services over the Internet
PANEL
- Hardware is King; Software is Queen: Has hardware become
a second-class citizen to software? [TE7]
TUTORIAL
- Video-Compression Circuits [T4]
Daytime Paper Sessions
Session: MP2
DISK-DRIVE SIGNAL PROCESSING
Chair: Gregory Uehara, University of Hawaii, Honolulu, HI
Associate Chair: Kiyoshi Fukahori, Silicon Systems, Inc., San
Jose, CA
DRIVERS
- Higher storage densities and transfer rates
- Technologies enabling higher levels of integration
- Design approaches for low-voltage low-power design
HIGHLIGHTS
- Channel rates of 400MHz (CMOS) and above (BiCMOS) [2.1, 2.2, 2.4]
- First fully-integrated DVD system [2.3]
- High integration level including read channel, disk controller,
micro-controller, and motion-control servo in CMOS [2.5]
- 3V 100MHz analog filter working down to 1.8V [2.6]
- Continuous-time analog adaptive equalizer [2.7]
Session: TP14
xDSL SIGNAL PROCESSORS
Co-Chair: Russ Apfel, Consultant, Austin, TX
Co-Chair: Lars Thon, IBM Almaden Research Ctr., San Jose, CA
DRIVERS
- High-speed Internet access for the home
- Use of already-installed twisted-pair wiring
- Inexpensive solutions to high-bandwidth demand
HIGHLIGHTS
- 14bit, 1MHz analog circuitry combined with DSP on a single chip
[14.2,14.3,14.4]
- High-linearity analog front-ends allow >18kft wire lengths for coverage of
more than 90% of households [14.2,14.4]
- Advanced modulation schemes for high spectral efficiency
[14.2,14.6,14.7]
- 756kb/s to 70Mb/s xDSL designs cover a wide range of applications
[14.4,14.6,14.7]
Session: TP15
MULTIMEDIA PROCESSORS
Co-Chair: Vojin Oklobdzjia, Integration, Berkeley, CA
Co-Chair: Wanda Gass, Texas Instruments, Dallas, TX
DRIVERS
- Convergence of Computer Entertainment and Consumer Electronics
- Writable DVD for digital video recording
- Digital TV and video conferencing (Internet, satellite, cable and HDTV)
HIGHLIGHTS
- Computer/Entertainment Mediaprocessor [15.1, 15.2]
- 3-D-Geometry Processors achieve GFLOP operation [15.1, 15.3, 15.4]
- Logarithm-domain nonlinear computing, 64-way SIMD Processor [15.4]
- Massively-Parallel Image Processing (16Kx64 CAM) [15.5]
- Video-Codec Datapaths for MPEG or H.263 [15.1, 15.6, 15.7]
Session: WA19
TRANSCEIVER DSPs
Chair: Chris Nicol, Bell Labs., Lucent Technologies, Holmdel,
NJ.
Associate Chair: Engell Roza, Phillips Research Laboratories,
Eindhoven, The Netherlands.
DRIVERS
- High-speed Internet access into the home
- High-quality digital TV
- High level of silicon integration for affordable consumer products
- Low-power solutions for handheld portable communication devices
HIGHLIGHTS
- Single-chip digital satellite receiver with IF input [19.1]
- First single-chip cable/set-top box transceiver [19.2]
- Single-chip HDTV demodulator for ATSC standard [19.3]
- Single-chip spatial-diversity QAM receiver for wireless applications
[19.4]
- High-speed Viterbi decoder [19.5] and low-power GPS synchronizer
[19.6]
Evening Panel Discussion
Panel Session: TE7
HARDWARE IS KING, SOFTWARE IS QUEEN: HAS HARDWARE BECOME A
SECOND- CLASS CITIZEN TO SOFTWARE?
OBJECTIVE
- What will be the model of computation for future systems-on-a-chip?
APPLICATIONS
- Very-large complex integrated circuits, such as a PC-on-a-chip or an
integrated multi-standard radio.
CHALLENGES
- How to manage the ever-growing size, complexity and power of new designs?
- How to reduce time-to-market?
CONTROVERSIES
- Scenario 1: Hardware is King
- Key technology is the "Silicon Intellectual Property" model.
- Hardware offers orders of magnitude improvement in power and performance.
- Scenario 2: Software is Queen
- Key technology is the "Software on a Processor" model.
- Software reduces time to market and offers maximum flexibility.
Tutorial
Tutorial: T4
VIDEO-COMPRESSION CIRCUITS
Stephen Molloy
OVERVIEW
- JPEG/MPEG/H.26x Encoder and Decoder Circuits
- Discrete Cosine Transform
- Quantization
- Zigzag Scan
- Run-length Coding
- Variable-length Coding
- Motion Estimation/Compensation
- Emerging Approaches (Wavelet-based Compression Circuits)
- Filterbank Design
- Issues in Quantization and Entropy Coding
TUTORIAL SPEAKER BIOGRAPHY
Stephen Molloy received the BSEE from Rensselaer Polytechnic Institute
in 1991, and the MS and PhD in EE from UCLA in 1993 and 1997 respectively. At
UCLA, his research interests included video compression circuits, video signal
processors, and low-power design. He is currently designing low-power,
high-performance digital camera ICs at Luxxon Corporation San Jose, CA.
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