SESSION TP3

SALON 7

TRANSCEIVERS AND POWER AMPLIFIERS

Chair: W. Ooms, Motorola, Inc., Tempe, AZ
Associate Chair: T. Lee, Stanford University, Stanford, CA

3.1 - A 900MHz Transceiver Chipset for Two-Way Paging Applications - 1:30 PM

S. Sanielevici, K. Cioffi, B. Ahrari, P. Stephenson, D. Skoglund, M. Zargari

Wireless Access, Inc., Santa Clara, CA

A 900MHz transceiver chipset for two-way paging applications includes bipolar RF front-end and CMOS baseband chip. All channel selection filters are integrated into the chipset. The overall system has 100dB dynamic range, -125dBm sensitivity level and approximately 67dB channel selectivity.

3.2 - A CMOS IF Transceiver for Narrowband PCS - 2:00 PM

T. Paulus, S. Somayajula, T. Miller, K. Choi, B. Trotter, D. Kerth

Crystal Semiconductor, Austin, TX

A 0.35um CMOS IF transceiver for narrowband PCS uses signal processing techniques to minimize analog complexity. The receiver converts IF to baseband by subsampling, trivial fs/4 mixing, bandpass A/D conversion and direct digital synthesis. The transmit section converts baseband to IF with an all-digital signal path and a simple D/A output driver.

3.3 - A Single-Chip CMOS Transceiver for DCS-1800 Wireless Communications - 2:30 PM

M. Steyaert, M. Borremans, J. Janssens, B. De Muer, N. Itoh1, J. Craninckx, J. Crols, E. Morifuji1, H. Sasaki1, W. Sansen

Katholieke Universiteit Leuven, Heverlee, Belgium

1Toshiba Corp., Kawasaki, Japan

A single-chip transceiver for a DCS-1800 wireless communication system uses a standard 0.25um CMOS process. A low-IF receiver and direct upconversion transmitter are used for a maximum level of integration. The 8.6mm2 circuit consumes 240mW from a 2.5V supply.

BREAK 3:00 PM

3.4 - A 3.6V, 4W, 0.2cm3 Si Power-MOS-Amplifier Module for GSM Handset Phones - 3:15 PM

I. Yoshida, M. Katsueda, M. Morikawa, Y. Matsunaga, T. Fujioka, M. Hotta, Y. Nunogawa, K. Kobayashi, S. Shimuzu, M. Nagata

Hitachi, Ltd., Tokyo, Japan

A Si power-MOS-amplifier module, with a 3.6V supply, 4W output power, and 47% efficiency, for GSM handset phones fits a leadless 0.2cm3 package. The module uses RF impedance-matched circuits to reduce line-loss, area, and to prevent oscillation. The power output MOSFET pair handles up to 3A at 900MHz.

3.5 - A 2.7 - 5.5V, 0.2 - 1W BiCMOS RF Driver Amplifier IC with Closed-Loop Power Control and Biasing Functions - 3:45 PM

S. Wong, S. Luo, L. Hadley1

Philips Research, Briarcliff, NY

1 Semiconductor, Sunnyvale, CA

An 800-900MHz driver amplifier is integrated with functions of a power control loop including a 25dB dynamic range power detector, filter, and a voltage regulator for biasing a discrete power device. The IC provides 0.25W/0.5W/1.0W of RF with 35 - 40% efficiency, and can be used to create 1 - 4W power amplifiers with over 50% efficiency.

3.6 - An IC for Linearizing RF Power Amplifiers using Envelope Elimination and Restoration - 4:15 PM

D. Su, W. McFarland

Hewlett-Packard Labs., Palo Alto, CA

An IC implements an envelope elimination and restoration system for linearizing power amplifiers. The 0.8um CMOS circuit includes a delta-mod switching power supply, limiter, and envelope detectors. The circuit linearizes three cellular power amplifiers transmitting NADC waveforms. Typical improvement in overall efficiency is from 36% to 50%, and in output power, from 26dBm to 28.5dBm.

CONCLUSION 4:45 PM

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