J. Sparso, Technical University of Denmark
An asynchronous re-implementation of a 7-band interpolated FIR filter bank is part of a digital hearing aid. When processing typical data (less than 50dB sound pressure), the 0.7um CMOS, 75k transistor chip consumes 85microwatt at 1.55V - >5x less than previous synchronous design.
MIT, Cambridge, MA
A 0.6um CMOS encryption processor using 260k transistor in 6.2x7mm2, enables dynamic tradeoff between security and energy expended per bit. Energy reduction techniques include self-timing gating, clock gating and adaptive supply voltage. At full width (512b) the chip consumes 134mW at 1V for 1Mb/s encryption. For ultra-low-power applications this hybrid consumes 150mW at 1Mb/s encryption.
DEIS - University of Bologna, Italy / SGS-Thomson
A micropower speech-controlled H.263 video decoder uses a 0.35um 5-metal CMOS process. The 650k-transistor decoder requires 36mm2, works at 0.9V supply, and consumes 500mW decoding a sQCIF stream.
1Philips Research Labs., Eindhoven, The Netherlands
2Philips Semiconductors ASG Microtel, Eindhoven, The Netherlands
An oscilloscope DSP combines acquisiton and signal-adaptive rasterizer with Moire prevention featuring a maximum throughput of 50kwaveform/s. The mixed-signal 70mm2 2.8M transistor chip, in 0.5um triple-metal CMOS, dissipates 430mW at 3.3V supply and 50MHz clock and embeds a 50MSample/s 8b ADC and 393kb RAM.
1Micronova Sistemi S.r.l., Pavia, Italy
2Amplifon S.p.A., Milano, Italy
3University of Pavia, Pavia, Italy
A dual-channel fully-integrated audiometric system generates the complete set of audio and control signals required for exhaustive audiometric tests. The 25mm2 chip, in 0.8um CMOS, consumes 45mW from a 5V power supply and achieves -80dB of crosstalk between channels.
Swiss Federal Institute of Technology (ETH), Zurich, Switzerland
A 0.5um CMOS 924MOPS FFT processor for fast 2D frequency-domain operation convolves two 1024x1024 data-sets in 0.2s based on 72b block-exponent arithmetic. The 2.3M transistor 11.6x14.4mm2 die consumes <6W at 66MHz. A multiprocessor system implementation results in linear scaling of overall system performance.
Go back to Table of Contents