SESSION FA7

SALON 1-6

LOW-POWER AND SIGNAL PROCESSING APPLICATIONS

Chair: W. Gass, Texas Instruments, Dallas, TX
Associate Chair: E. Roza, Philips Research Labs, Eindhoven,
The Netherlands

7.1 - An 85microwatt Asynchronous Filter-Bank for a Digital Hearing Aid - 8:30 AM

L. Nielsen, Oticon, Inc., Hellerup, Denmark

J. Sparso, Technical University of Denmark

An asynchronous re-implementation of a 7-band interpolated FIR filter bank is part of a digital hearing aid. When processing typical data (less than 50dB sound pressure), the 0.7um CMOS, 75k transistor chip consumes 85microwatt at 1.55V - >5x less than previous synchronous design.

7.2 - A 1Mb/s Energy/Security Scalable Encryption Processor Using Adaptive Width and Supply - 9:00 AM

J. Goodman, A. Chandrakasan

MIT, Cambridge, MA

A 0.6um CMOS encryption processor using 260k transistor in 6.2x7mm², enables dynamic tradeoff between security and energy expended per bit. Energy reduction techniques include self-timing gating, clock gating and adaptive supply voltage. At full width (512b) the chip consumes 134mW at 1V for 1Mb/s encryption. For ultra-low-power applications this hybrid consumes 150mW at 1Mb/s encryption.

7.3 - A 1V, 500mW Voice-Controlled H.263 Video Decoder for Portable Systems - 9:30 AM

L. Bolcioni, M. Borgatti, M. Felici, R. Rambaldi, R. Guerrieri

DEIS - University of Bologna, Italy / SGS-Thomson

A micropower speech-controlled H.263 video decoder uses a 0.35um 5-metal CMOS process. The 650k-transistor decoder requires 36mm², works at 0.9V supply, and consumes 500mW decoding a sQCIF stream.

BREAK 10:00 AM

7.4 - A 0.4W Mixed-Signal Digital Storage Oscilloscope Processor with Moire Prevention - 10:15 AM

M. Vertregt¹, W. Rey¹, M. Boonen², J. Verhaegh², W. Wiertsema²

¹Philips Research Labs., Eindhoven, The Netherlands

²Philips Semiconductors ASG Microtel, Eindhoven, The Netherlands

An oscilloscope DSP combines acquisiton and signal-adaptive rasterizer with Moire prevention featuring a maximum throughput of 50kwaveform/s. The mixed-signal 70mm² 2.8M transistor chip, in 0.5um triple-metal CMOS, dissipates 430mW at 3.3V supply and 50MHz clock and embeds a 50MSample/s 8b ADC and 393kb RAM.

7.5 - An 0.8um CMOS Mixed Analog-Digital Integrated Audiometric System - 10:45 AM

S. Brigati¹, F. Francesconi¹, G. Grassi², D. Lissoni², P. Malcovati³, A. Nobile², M. Poletti³, F. Maloberti³

¹Micronova Sistemi S.r.l., Pavia, Italy

²Amplifon S.p.A., Milano, Italy

³University of Pavia, Pavia, Italy

A dual-channel fully-integrated audiometric system generates the complete set of audio and control signals required for exhaustive audiometric tests. The 25mm² chip, in 0.8um CMOS, consumes 45mW from a 5V power supply and achieves -80dB of crosstalk between channels.

7.6 - A High Precision 1024-point FFT Processor for 2D Convolution - 11:15 AM

M. Wosnitza, M. Cavadini, M. Thaler, G. Troster

Swiss Federal Institute of Technology (ETH), Zurich, Switzerland

A 0.5um CMOS 924MOPS FFT processor for fast 2D frequency-domain operation convolves two 1024x1024 data-sets in 0.2s based on 72b block-exponent arithmetic. The 2.3M transistor 11.6x14.4mm² die consumes <6W at 66MHz. A multiprocessor system implementation results in linear scaling of overall system performance.

CONCLUSION 11:45 AM

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