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Chair: W. Ooms, Motorola, Inc., Tempe, AZ
Associate Chair: P. Davis, AT&T Bell Labs, Reading, PA
3.1 A 1.5V 900MHz Downconversion Mixer (1:30)
B. Razavi
AT&T Bell Labs, Holmdel, NJ
A fully-differential mixer with an output amplifier uses capacitive degeneration to relax the noise-distortion trade-off, and capacitive coupling and feedback to allow operation from a 1.5V supply. Fabricated in a 20GHz 1mm BiCMOS technology, the prototype exhibits 15dB noise figure with 3dBm input IP3 while dissipating 15mW.
3.2 A 2.7V 900MHz CMOS LNA and Mixer (2:00)
A. Karanicolas
AT&T Bell Labs, Holmdel, NJ
A 0.5um CMOS LNA and mixer prototype incorporates current reuse to increase amplifier transconductance without increasing power dissipation. The LNA exhibits 11dB gain, 3.2dB NF, and 0dBm input IP3 while dissipating 20mW. The mixer exhibits 10dB gain, 12.5dB DSB NF, and +1dBm input IP3 while dissipating 7mW and using a 0dBm LO drive.
3.3 A 1W 830MHz Monolithic BiCMOS Power Amplifier (2:30)
S. Wong, H. Bhimnathwala, S. Luo, B. Halali(1), S. Navid(1)
Philips Research Laboratories, Briarcliff Manor, NY
(1)Philips Semiconductors, Sunnyvale, CA
A monolithic RF power amplifier on a 0.8um BiCMOS process has 30dB gain. On-chip inductors for interstage matching, negative-impedance cancellation to boost gain and impedance level, and a temperature-compensated biasing scheme are included.
BREAK (3:00)
3.4 A 900MHz Integrated Discrete-Time Filtering RF Front-End (3:15)
D. Shen, C-M. Hwang, B. Lusignan, B. Wooley
Stanford University, Stanford, CA
An RF front-end uses discrete-time filters instead of off-chip components for frequency selection and down-conversion. A 35dB system gain and 38dB suppression of interfering channels is achieved with switched-capacitor filters clocked at 78MHz. The 0.6um BiCMOS chip dissipates 112mW from a 3.3V supply.
3.5 An 81MHz IF Receiver in CMOS (3:45)
A. Hairapetian
Rockwell International Corp., Newport Beach, CA
An IF amplifier, subsampling mixer, and sixth-order bandpass SD A/D converter are built on a 0.8um CMOS process. The chip includes 24dB programmable gain to achieve 92dB dynamic range in a 200kHz bandwidth. The chip uses a single 3V supply and consumes 14.4mW.
3.6 A 0.25mW 13b Passive Sigma-delta Modulator (4:15)
for a 10MHz IF Input
F. Chen, B. Leung
University of Waterloo, Waterloo, Canada
A 2nd-order Sigma-delta modulator with passive loop filter and built-in passive mixer for direct conversion implemented in 1.2um CMOS technology achieves 67dB peak SNDR and 78dB dynamic range. Two-tone tests show -82dB IM3 at -13dB input. The 0.4mm2 chip consumes 0.25mW from a 3.3V supply.
CONCLUSION (4:45)
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