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OPTICAL INTERCONNECTS, HIGH TEMPERATURE, & PACKAGING
Chair: E. Perea, Thomson-CSF / TCS, Orsay, France
Associate Chair: J. Ewen, IBM T.J. Watson Research Center, Yorktown Heights, NY
25.1 System and Circuit Challenges in IR Wireless Communication (1:00)
M. Ritter, F. Gfeller(1), D. Rogers, S. Gowda
IBM T.J. Watson Research Center, Yorktown Heights, NY
(1)IBM Zurich Research Laboratory, Rushlikon, Switzerland
An integrated IR wireless transceiver with 71dB gain and 100dB dynamic range at 8MHz bandwidth demonstrates 3uW/cm2 minimum sensitivity. Signal-processing techniques improve the sensitivity by up to 20dB.
25.2 Serial Networks for Computing Applications (1:30)
R. Marbot, P. Couteaux, J-C. Lebihan, R. Nezamzadeh, A. Pierre-Duplessix
Bull Serial Link Technology, Les Clayes sous Bois, France
An overview of the current state-of-the-art serial link technology is presented. A low-cost, low-power Gb/s data rate ASIC approach featuring compatibility with standard CMOS technology for ease of integration with complex digital functions is discussed.
25.3 High-Temperature Electronics using Silicon Technology (2:00)
J. Haslett, F. Trofimenkoff, I. Finvers(1), F. Sabouri, R. Smallwood(2)
The University of Calgary, Alberta, Canada
(1)Mitel Corporation, Kanata, Ontario, Canada
(2)McAllister Petroleum Services Ltd., Calgary, Alberta, Canada
The techniques used to design CMOS mixed analog/digital circuits for operation up to 225°C are presented. Several design examples are discussed together with the fundamental limitations of the approach, and an overview of current high-temperature process technologies including SOI and SiC.
BREAK (2:30)
25.4 Intelligent Optical Backplanes (3:15)
H. Hinton, K. Devenport, D. Plant(1), T. Szymanski(1)
University of Colorado, Boulder, CO
(1)McGill University, Montreal, Canada
Free-space optical technology is one approach to overcome the interconnection bottleneck in large multiprocessor or switch systems. A 4x9 smart-pixel array containing optoelectronic devices and CMOS circuits implements a dynamically reconfigurable backplane.
25.5 15um Solder Bonding of GaAs/AlGaAs Multiple- Quantum-Well Devices to MOSIS 0.8um CMOS for 1Gb/s Two-Beam Smart-Pixel Receiver/Transmitter (3:45)
T. Woodward, A. Krishnamoorthy, K. Goossen, J. Walker, A.Lentine(1), R. Novotny(1), L. D'Aaro(2), L. Chirovsky(2), S. Hui(2), B. Tseng(2), D. Kossives(2), D. Dahringer(2), R. Leibenguth(2), J. Cunningham, W. Jan, D. Miller
AT&T Bell Labs, Holmdel, NJ
(1)AT&T Bell Labs, Naperville, IL
(2)AT&T Bell Labs, Murray Hill, NJ
A 2-beam smart-pixel optical repeater circuit using GaAs/AlGaAs multiple-quantum-well p-i-n devices attached to a 0.8um CMOS chip demonstrates an optical sensitivity of -21.5dBm at 622Mb/s. Each 45x25um2 smart pixel dissipates 10mW from a 5V supply.
25.6 A Millimeter-Wave Flip-Chip IC using Micro-Bump Bonding Technology (4:15)
H. Sakai, Y. Ota, K. Inoue, M. Yanagihara, T. Matsuno, M. Tanabe, T. Yoshida1, Y. Ikeda1, S. Fujita1, K. Takahashi1, M. Sagawa1
Matsushita Electronics Corp., Osaka, Japan
1Matsushita Electric Industrial Co., Ltd. Osaka, Japan
A mm-wave flip-chip bonding technology featuring micro-bump bonding and microstrip lines on a 26um thick benzo-cyclo-buthene dielectric film achieves 0.5dB/lamda insertion loss at 60GHz. The approach allows single-chip antenna integration.
CONCLUSION (4:45)
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