Plenary Session

Chair: W. David Pricer, ISSCC Executive Committee Chair
Associate Chair: Timothy Tredwell, Eastman Kodak, Rochester, NY

FORMAL OPENING OF CONFERENCE


INVITED ADDRESS (9:15)

1.1 Digital-Storage Media in the Digital-Highway Era

Toshiyuki Yamada
Sony Corporation, Yokohama, Japan

The digital highway will not make packaged media and home recording obsolete. Rather, their importance will increase as people become accustomed to handling the plethora of digital signals passing along the information superhighway. The recently-developed digital VCR uses digital video signal compression to reduce the bit rate to 25Mb/s for standard and 50Mb/s for high-definition TV systems. The codec is based upon the discrete cosine transform algorithm and requires approximately 0.5M logic gates and over 10Mb video RAM. With the remarkable progress of ULSI technology, these large-scale circuits are now possible. Further reduction of power consumption is essential for portable camcorder applications.

Digital video disks constitute another genre of emerging technology. The video CD employs the MPEG 1 compression standard to record 74 minutes of video on a 12cm compact disk. Advanced video disk technologies are being investigated to improve picture quality and extend play time. Here again, ULSI technology plays a crucial role.

This talk outlines these digital-storage-media technologies together with their historical perspectives and future possibilities. A comparison between magnetic and optical recording, as well as between tape and disk media, will also be covered in the discussion.


ISSCC, JSC, and IEEE AWARD PRESENTATIONS (10:00)


Break (10:15)


INVITED ADDRESS (10:30)

1.2 The Making of the PowerPC

Raymond DuPont, R. Bailey /D. Bearden , P. Rossbach
IBM /Motorola, Austin, TX

As with DRAM, the development cost of microprocessors has become more than a single company can justify. For this reason, companies are beginning to join together to share the cost of these designs. At the forefront of this industry trend is the alliance of IBM, Motorola, and Apple. These companies have committed their future to the PowerPC technology. This paper will discuss some of the details of this alliance. The PowerPC architecture is based on the POWER architecture that has been in production for several years. This architecture was modified through joint negotiations with IBM, Apple and Motorola, making it a strong base upon which to build a line of microprocessors that target a wide range of systems. The formation and organization of the Somerset Design Center will be discussed, along with some of the factors that led to the successful design of the first PowerPC microprocessors. The design methodology will then be discussed. The manner in which the best of Motorola, IBM and vendor tools have been combined to develop leading-edge microprocessors will be covered. The chip design flow will be discussed along with the results of this design effort. The paper will close with a discussion of the future of the PowerPC relationships.


INVITED ADDRESS (11:15)

1.3 Gigachips: Deliver Affordable Multimedia

for Work and Play Via Broadband Network and the Set-Top Box
Pallab Chatterjee, Texas Instruments, Dallas, Texas

The digital-information highway promises to change our lives in the next decade with a new set of services. But the services will be successful only if they fulfill unmet user needs: lifelong learning, mobility and teaming, and integrated living.

High-speed networks, such as asynchronous transfer mode (ATM) networks, will soon become the backbone of the digital highway. ATM will connect large volumes of video data to thousands of homes at a typical rate of 50Mb/s by the year 1999. The aggregate bandwidth of the backbone of such a switching system is greater than 50Gb/s. To achieve this goal, a typical implementation at 0.8mm with today's commercially available technology would require 100 PC boards, dissipating more than 1kW. To make a reliable cost-effective backbone, the entire system must be implemented with one to two circuit boards dissipating at most 10W.

The set-top box will provide high-quality video to the home from the highway. The set-top box includes three major functions: demodulation, transport and decompression. The set-top box as built today requires 15 different chips with a total of 500k gates of logic and 256kb of RAM. For the box to become pervasive, the entire function must be integrated onto a single chip costing less than $20 in the year 1999. Once the cost of accessing the broadband information highway is sufficiently low, the function of the set-top box will migrate into both wired and wireless consumer products, such as digital television, the personal computer, and the video telephone. This will enable new services, such as desktop video conferencing, portable video communications, and access to the best doctor or the best instructor.

This new digital highway into the home presents several challenges to silicon suppliers. Digital signal processing is required for real-time video compression and decompression, modulation and coding, and ATM packet transport without jitter. Complex algorithms for compression and modulation/demodulation and complex new protocols for transport of data are needed. Standards incorporating these algorithms and protocols are essential in achieving interoperable equipment.


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