A 900MHz quadrature downconverter in standard 0.7mm CMOS requires no external components. A double-quadrature structure with use of asymmetric polyphase filters achieves 0.3° typical phase error without tuning or trimming. The 6mm2 die operates from a 5V supply.

8.2 A 1.9GHz Si Direct-Conversion Receiver IC for QPSK Modulation Systems (9:00)

A 1.9GHz direct-conversion receiver chip integrates low-noise amplifier, mixers, low-pass filters, and variable-gain amplifiers. Local-oscillator suppression to LNA input is -65dB. 2nd-order distortion with -30dBm input is -50dBc, trimmable to -80dBc. The BiCMOS chip with 15GHz npns consumes 165mW from a 2.7V supply.

8.3 A Low-Voltage Silicon Bipolar RF Front-End for PCN Receiver Applications (9:30)

A 1.9GHz prototype low-noise amplifier and mixer in 0.8mm BiCMOS with 11GHz npns incorporates monolithic microstrip transformers. At 1.9V supply, the third-order intercept is 2.3dBm with 10.9 dB noise figure and 5mW dissipation. The LNA input intercept is -10dBm with 2.7dB noise figure and 10.5dB gain at 4mW dissipation.

8.4 A Sequential-Gain IC for Battery-Powered Miniature Short-Range Wireless Data Receiver (10:00)

An IC implements a new receiver architecture for wireless data communication. 75dB gain at the input radio frequency is achieved using a SAW transversal filter for RF signal storage. The receiver has -103dBm sensitivity and draws 1mA from 2.7V. The 1.3mm bipolar chip with 8GHz npns is 3.2mm2.

8.5 A 3V MMIC Chip Set for 1.9GHz Mobile-Communication Systems (10:15)

A GaAs MESFET MMIC chip-set contains an SPDT switch with 30dBm 1dB compression level, a fully integrated 22dBm power amplifier, a 2.2dB noise-figure 17.4dB-gain low-noise amplifier, and a down and up converter with 20dBc local-oscillator leakage. Chips are 1mm2, 2.3mm2, 2.3mm2, and 3.4mm2. The LNA current is 3mA.

Break (10:30)

8.6 A 3.0V 2GHz Transmitter IC for Digital-Radio Communication with Integrated VCOs. (10:45)

A 3.0V 2GHz DECT transmitter IC with integrated VCOs achieves -110dBc/Hz adjacent-channel phase noise. The device operates from a 3-cell power supply without external regulation, due to an integrated low-drop voltage regulator. Device current is 27mA.

8.7 2.7V GSM Transceiver ICs with On-Chip Filtering (11:15)

A GSM transceiver is realized in two 2.7V ICs. They _include two LNAs with gain/loss switchable over 59dB and noise figures of 1.7dB and 2.2dB at 3.6mA, integrated 5th-order analog baseband filters taking 375mA, a PA driver giving +8dBm ±0.5dB with spurs below -37dBc, and an IF synthesizer.

8.8 A 2.7V to 4.5V Single-Chip GSM Transceiver RF Integrated Circuit (11:45)

A single-chip GSM transceiver RF IC with transmitter, receiver, and synthesizers, implemented in a 12GHz 1.5mm bipolar process, includes UHF synthesizer that settles to 0.1ppm in 0.5ms, two fixed-frequency PLLs, direct-up-modulator with 0dBm single-ended output into 50W, and single-IF receiver with RF mixer, quadrature demodulator, and variable IF gain. Supply currents in transmit and receive are 60mA and 50mA.

Conclusion (12:00)

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