The Role of ATM on the Digital Highway

Objective: This Course on broadband networks emphasizes on Asynchronous Transfer Mode. No prior knowledge of the subject is assumed or required. On completing the course attendees will understand the basic operating principles of ATM-based networks and underlying characteristics of multimedia data driving those network architectures. Attendees will also understand design issues involved in ATM terminal and switch architectures and implementation.

Outline

Overview of Broadband Networks and the Asynchronous Transfer Mode (Acampora)

Overviews of architectures, technologies, management and control strategies, protocols, standards and future directions of broadband networks for multimedia services. Telecommunications traffic characteristics, and the bandwidth-on-demand and universal features of ATM that to deal with those characteristics. Function of the ATM adaptation layer, and LANs, WANs and Metropolitan Area subnetworks. Traffic management issues, strategies and metrics.Proposed wavelength-division multiplexing approach.

Applications of SONET and ATM Technologies in High Speed Networking (Cheung)

Early networking technologies and LAN and WAN, introduction to Synchronous Optical NETwork (SONET). ATM layer and ATM Adaptation Layer (AAL), and the roles they play in the transport of user and signaling traffic with emphasis on the interworking of the private enterprise network with public metropolitan and WANs. Application of SONET and ATM standards in emerging gigabit networks, and current experimental gigabit network testbeds. Examples of VLSI circuit implementation of SONET and ATM protocols.

Asynchronous Transfer Mode Terminal Interfaces (Johnston)

ATM/SONET-based terminal interfaces and system design. Design compromises between clock frequency and data path width, examples drawn from the UTOPIA interface proposed by the ATM Forum. Implementation alternatives of Cyclic Redundancy Check (CRC) to support ATM and ATM adaptation layers, and techniques for packet reassembly. Examples of research and commercially available interfaces illustrate the concepts. Trade-off between software- and hardware-based implementations and implementation issues of higher data rate interfaces such as SONET STS-12c and STS-48c.

ATM Switch Architecture Design (Chao)

The basic functions of an ATM switch, cell routing and output-port contention resolution, and self-routing networks and contention resolution schemes. Multicasting, the replication, routing and header updating. Switch fabric structures and buffering strategies, and performance and implementation complexity. Design challenges and architectural proposals for a large-scale ATM switch. Implementation details of selected switch architectures.

The Instructors

Anthony S. Acampora, Professor of EE, Columbia University and Director of the Center for Telecommunications Research, joined Columbia following a 20 years at AT&T Bell Laboratories in radio and satellite communications. At Columbia he is involved in research and educational programs in a wide variety of communication areas. He lectures internationally on communications topics.

Nim K. Cheung, Executive Director of the Network Control and Management Systems Dept. in the Applied Research Area, Bellcore earned a PhD in Physics from C I T and has held research and management positions at AT&T Bell Labs and Bellcore in fiber optics, and SONET/ATM network technologies. He has 80 papers in advanced telecommunications and is a Senior Editor of the IEEE Journal on Selected Areas in Communications.

Cesar A. Johnston, Member of Technical Staff in the Applied Research Area, Bellcore, has pioneered in SONET and ATM-based broadband networks since 1987. He led the design and system integration of a 2.5Gb/s HIPPI-ATM-SONET terminal interface for the Nectar Gigabit Testbed and is now prototyping ATM/SONET interfaces at STS-12c and STS-48c data rates. He has over 20 publications and two patents.

H. Jonathan Chao, Associate Professor of EE at Polytechnic University since 1992, was a Member of Technical Staff at Bellcore for 6 years. There he implemented high-speed VLSI chips for SONET/ATM-based broadband networks. His research includes large-scale multicast ATM switches, high-speed computer communications, and congestion/flow control in ATM networks. He holds a dozen patents and over 40 publications.

Registration: use ISSCC95 Registration Form on the Advance Program centerfold.


Go back to the SSCS page

Go back to the ISSCC page

If you have any comments for the ISSCC, please forward them to

Frank Hewlett
hewletfw@sandia.gov

Comments related to the maintenance of this web site should be sent to sscs@eecg.toronto.edu .


http://www.isscc.org/isscc/1995/ap/course.htm
Last modified : Tuesday February 17, 1998 at 7:59am EDT